16 #define FRAM_OPCODE_WREN 0x06 // Set write enable latch
17 #define FRAM_OPCODE_WRDI 0x04 // Reset write enable latch
19 #define FRAM_OPCODE_RDSR 0x05 // Read Status Register
20 #define FRAM_OPCODE_WRSR 0x01 // Write Status Register
22 #define FRAM_OPCODE_READ 0x03 // Read memory data
23 #define FRAM_OPCODE_FSTRD 0x0b // Fast read memory data
24 #define FRAM_OPCODE_WRITE 0x02 // Write memory data
26 #define FRAM_OPCODE_SLEEP 0x99 // Enter sleep mode
27 #define FRAM_OPCODE_RDID 0x9F // Read device ID
28 #define FRAM_OPCODE_SNR 0xc3 // Read S/N
30 static uint8_t fram_deviceid[9] = { 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0xC2, 0x24, 0x00 };
34 uint8_t fram_deviceid_read[9];
38 return !memcmp(fram_deviceid_read, fram_deviceid, 9);
41 void FRAM_write(uint32_t address, uint8_t *data, uint32_t length)
44 SPI_cmd(SPI_FRAM, FRAM_OPCODE_WREN);
46 SPI_burstwrite32(SPI_FRAM, ((FRAM_OPCODE_WRITE << 24) | (address & 0xFFFFFF)), data, length);
49 void FRAM_read(uint32_t address, uint8_t *data, uint32_t length)
51 SPI_burstread32(SPI_FRAM, ((FRAM_OPCODE_READ << 24) | (address & 0xFFFFFF)), data, length);
uint8_t SPI_burstread8(uint8_t spi_num, uint8_t addr, uint8_t *data, uint32_t len)
void FRAM_read(uint32_t address, uint8_t *data, uint32_t length)
uint8_t SPI_burstread32(uint8_t spi_num, uint32_t addr, uint8_t *data, uint32_t len)
void FRAM_write(uint32_t address, uint8_t *data, uint32_t length)
uint8_t SPI_cmd(uint8_t spi_num, uint8_t cmd)
uint8_t SPI_burstwrite32(uint8_t spi_num, uint32_t addr, uint8_t *data, uint32_t len)